sectionPGO - Block 1 2026 [a9fde3e6]
1. Li, David Xinliang, Raksit Ashok, and Robert Hundt. “Lightweight Feedback-Directed Cross-Module Optimization.” Proceedings of the 8th Annual IEEE/ACM International Symposium on Code Generation and Optimization, ACM, April 24, 2010, 53–61. doi.org/10.1145/1772954.1772964. [264affb8]
1. Li, David Xinliang, Raksit Ashok, and Robert Hundt. “Lightweight Feedback-Directed Cross-Module Optimization.” Proceedings of the 8th Annual IEEE/ACM International Symposium on Code Generation and Optimization, ACM, April 24, 2010, 53–61. doi.org/10.1145/1772954.1772964. [264affb8]
- Two most important IPO passes are function inlining and indirect function call promotion
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Basically:
- We want to have a smarter way of combining things without making fat .o files
- We can use FDO analysis to determine which functions are hot and worth inlining or promoting
- In order to do so, we can use a greedy algorithm to generate families, which help link these together
- We push linking earlier by using the profiled data
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Profile data is augmented FDO data, so
- After training run is done, the in-memory info contains a callgraph, using a greedy clustering algorithm to decide on "friends"
- afterwards, we have a standard FDO data (raw counts of how many times each branch was taken), and also module grouping decisions
- In order to make this workable for Buck / Blaze / Bazel, an auxillery file needs to get shipped so the build system knows which sources to include, even when they're not strictly dependant, as a form of dynamic dependency injection
- Predacessor to LTO (and ThinLTO)
- lists.llvm.org/pipermail/llvm-dev/2019-September/135393.html
1.1. Discussion
1.1. Discussion
- Coming from FDO baseline is a bit specious
- What is a translation unit here?
2. Panchenko, Maksim, Rafael Auler, Bill Nell, and Guilherme Ottoni. “BOLT: A Practical Binary Optimizer for Data Centers and Beyond.” arXiv:1807.06735. Preprint, arXiv, October 12, 2018. doi.org/10.48550/arXiv.1807.06735.
2. Panchenko, Maksim, Rafael Auler, Bill Nell, and Guilherme Ottoni. “BOLT: A Practical Binary Optimizer for Data Centers and Beyond.” arXiv:1807.06735. Preprint, arXiv, October 12, 2018. doi.org/10.48550/arXiv.1807.06735.
- How does this interact with ASLR?
- I-cache much more constrained than Dcache
3. Chen, Dehao, David Xinliang Li, and Tipp Moseley. “AutoFDO: Automatic Feedback-Directed Optimization for Warehouse-Scale Applications.” Proceedings of the 2016 International Symposium on Code Generation and Optimization, February 29, 2016, 12–23. doi.org/10.1145/2854038.2854044.
3. Chen, Dehao, David Xinliang Li, and Tipp Moseley. “AutoFDO: Automatic Feedback-Directed Optimization for Warehouse-Scale Applications.” Proceedings of the 2016 International Symposium on Code Generation and Optimization, February 29, 2016, 12–23. doi.org/10.1145/2854038.2854044.
- Largely leverages the LBT, but also has to decide on the CFG
- The control flow graph has some nuances
- Optimization is one way, a binary once optimized may not be easily reversible back. Inlined functions are destructive transforms
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Context sensitive -> it uses the path taken to measure hotness for a function
- i.e. foo -> bar -> baz. Baz might be cold globally, but baz might be really hot for the path itself
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Calculating edge frequency
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Moves data into equvilance classes
- Basic blocks within the same loop or dominated by the same condition have the same equivlance class
- A function might be frequently called, but the functions inside it are varied, so we need the calling context
- Flow based heuristic is iterative
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- Compiler needs to basically map the control flow structure to map what's show in the profiler
4. Ayers, Grant, Nayana Prasad Nagendra, David I. August, et al. “AsmDB: Understanding and Mitigating Front-End Stalls in Warehouse-Scale Computers.” Proceedings of the 46th International Symposium on Computer Architecture, June 22, 2019, 462–73. doi.org/10.1145/3307650.3322234.
4. Ayers, Grant, Nayana Prasad Nagendra, David I. August, et al. “AsmDB: Understanding and Mitigating Front-End Stalls in Warehouse-Scale Computers.” Proceedings of the 46th International Symposium on Computer Architecture, June 22, 2019, 462–73. doi.org/10.1145/3307650.3322234.
- icache is frontend, and must be saved, because there's no out of order execuation
- figure 12 - multiple basic blocks are blocked
- Think hard about basic blocks and how they relate to this
5. Jamilan, Saba, Tanvir Ahmed Khan, Grant Ayers, Baris Kasikci, and Heiner Litz. “APT-GET: Profile-Guided Timely Software Prefetching.” Proceedings of the Seventeenth European Conference on Computer Systems, March 28, 2022, 747–64. doi.org/10.1145/3492321.3519583.
5. Jamilan, Saba, Tanvir Ahmed Khan, Grant Ayers, Baris Kasikci, and Heiner Litz. “APT-GET: Profile-Guided Timely Software Prefetching.” Proceedings of the Seventeenth European Conference on Computer Systems, March 28, 2022, 747–64. doi.org/10.1145/3492321.3519583.
- Uses the cycle counter in the LBR
- Uses the graph only, out of the CRONO suite
6. Shen, Han, Krzysztof Pszeniczny, Rahman Lavaee, Snehasish Kumar, Sriraman Tallam, and Xinliang David Li. “Propeller: A Profile Guided, Relinking Optimizer for Warehouse-Scale Applications.” Proceedings of the 28th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, Volume 2, January 27, 2023, 617–31. doi.org/10.1145/3575693.3575727.
6. Shen, Han, Krzysztof Pszeniczny, Rahman Lavaee, Snehasish Kumar, Sriraman Tallam, and Xinliang David Li. “Propeller: A Profile Guided, Relinking Optimizer for Warehouse-Scale Applications.” Proceedings of the 28th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, Volume 2, January 27, 2023, 617–31. doi.org/10.1145/3575693.3575727.
Disassembly is one of the primary serializing bottlenecks in state of the art PLO tools [52]. Accurate recursive disassembly [7] of complex applications is challenging to distribute across many machines due to the incremental nature of discovery.
Why? Can we not parallelize these?